2024-05-17 13:15:10 -05:00
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import Foundation
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import SDL
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2024-05-10 22:06:45 -05:00
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enum AddressingMode {
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case Immediate
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case ZeroPage
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case ZeroPage_X
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case ZeroPage_Y
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case Absolute
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case Absolute_X
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case Absolute_Y
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case Indirect_X
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case Indirect_Y
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case NoneAddressing
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}
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2024-08-19 21:05:08 -05:00
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enum Interrupt {
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case NMI
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var vectorAddr: UInt16 {
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switch self {
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case .NMI:
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0xfffa
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}
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}
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var bFlagMask: UInt8 {
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switch self {
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case .NMI:
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0b00100000
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}
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}
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var cpuCycles: UInt8 {
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switch self {
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case .NMI:
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2
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}
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}
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}
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2024-05-11 22:30:17 -05:00
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struct CPUFlags: OptionSet {
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var rawValue: UInt8
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static let carry = CPUFlags(rawValue: 0b00000001)
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static let zero = CPUFlags(rawValue: 0b00000010)
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static let interruptDisable = CPUFlags(rawValue: 0b00000100)
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static let decimalMode = CPUFlags(rawValue: 0b00001000)
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static let break1 = CPUFlags(rawValue: 0b00010000)
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static let break2 = CPUFlags(rawValue: 0b00100000)
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static let overflow = CPUFlags(rawValue: 0b01000000)
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static let negative = CPUFlags(rawValue: 0b10000000)
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}
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let STACK: UInt16 = 0x0100
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let STACK_RESET: UInt8 = 0xfd
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2024-05-10 22:06:45 -05:00
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class CPU {
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var register_a: UInt8 = 0
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var register_x: UInt8 = 0
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var register_y: UInt8 = 0
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2024-05-11 22:30:17 -05:00
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var stackPointer: UInt8 = STACK_RESET
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var status: CPUFlags = [.interruptDisable, .break2]
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2024-05-10 22:06:45 -05:00
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var programCounter: UInt16 = 0
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2024-08-18 14:55:39 -05:00
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var bus: Bus
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init(bus: Bus) {
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self.bus = bus
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}
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2024-05-10 22:06:45 -05:00
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2024-08-19 21:05:08 -05:00
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func getOpperandAddress(_ mode: AddressingMode) -> (UInt16, Bool) {
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2024-05-10 22:06:45 -05:00
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switch mode {
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case .Immediate:
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2024-08-19 21:05:08 -05:00
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return (programCounter, false)
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2024-08-18 14:55:39 -05:00
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default:
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return getAbsoluteAddress(mode, addr: programCounter)
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}
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}
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2024-08-19 21:05:08 -05:00
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func getAbsoluteAddress(_ mode: AddressingMode, addr: UInt16) -> (UInt16, Bool) {
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2024-08-18 14:55:39 -05:00
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switch mode {
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2024-05-10 22:06:45 -05:00
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case .ZeroPage:
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2024-08-19 21:05:08 -05:00
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return (UInt16(memRead(addr)), false)
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2024-05-10 22:06:45 -05:00
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case .Absolute:
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2024-08-19 21:05:08 -05:00
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return (memReadU16(addr), false)
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2024-05-10 22:06:45 -05:00
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case .ZeroPage_X:
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2024-08-18 14:55:39 -05:00
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let pos = memRead(addr)
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2024-05-10 22:06:45 -05:00
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let addr = pos &+ register_x
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2024-08-19 21:05:08 -05:00
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return (UInt16(addr), false)
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2024-05-10 22:06:45 -05:00
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case .ZeroPage_Y:
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2024-08-18 14:55:39 -05:00
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let pos = memRead(addr)
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2024-05-10 22:06:45 -05:00
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let addr = pos &+ register_y
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2024-08-19 21:05:08 -05:00
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return (UInt16(addr), false)
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2024-05-10 22:06:45 -05:00
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case .Absolute_X:
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2024-08-18 14:55:39 -05:00
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let base = memReadU16(addr)
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2024-08-19 21:05:08 -05:00
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let addr = base &+ UInt16(register_x)
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return (addr, isPageCross(base, addr))
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2024-05-10 22:06:45 -05:00
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case .Absolute_Y:
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2024-08-18 14:55:39 -05:00
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let base = memReadU16(addr)
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2024-08-19 21:05:08 -05:00
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let addr = base &+ UInt16(register_y)
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return (addr, isPageCross(base, addr))
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2024-05-10 22:06:45 -05:00
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case .Indirect_X:
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2024-08-18 14:55:39 -05:00
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let base = memRead(addr)
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2024-05-10 22:06:45 -05:00
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let ptr = UInt8(base) &+ register_x
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let lo = memRead(UInt16(ptr))
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let hi = memRead(UInt16(ptr &+ 1))
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2024-08-19 21:05:08 -05:00
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return (UInt16(hi) << 8 | UInt16(lo), false)
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2024-05-10 22:06:45 -05:00
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case .Indirect_Y:
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2024-08-18 14:55:39 -05:00
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let base = memRead(addr)
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2024-05-10 22:06:45 -05:00
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let lo = memRead(UInt16(base))
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let hi = memRead(UInt16(base &+ 1))
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let deref_base = UInt16(hi) << 8 | UInt16(lo)
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let deref = deref_base &+ UInt16(register_y)
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2024-08-19 21:05:08 -05:00
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return (deref, isPageCross(deref, deref_base))
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2024-08-18 14:55:39 -05:00
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default:
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2024-05-10 22:06:45 -05:00
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fatalError("mode \(mode) is not implemented")
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}
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}
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2024-08-19 21:05:08 -05:00
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func isPageCross(_ lhs: UInt16, _ rhs: UInt16) -> Bool {
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lhs & 0xff00 != rhs & 0xff00
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}
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2024-05-10 22:06:45 -05:00
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func reset() {
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register_a = 0
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register_x = 0
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register_y = 0
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2024-05-11 22:30:17 -05:00
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stackPointer = STACK_RESET
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status = [.interruptDisable, .break2]
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2024-05-10 22:06:45 -05:00
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programCounter = self.memReadU16(0xFFFC)
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}
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2024-08-18 14:55:39 -05:00
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//func loadAndRun(_ program: [UInt8]) {
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//load(program)
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//reset()
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//run()
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//}
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//func load(_ program: [UInt8]) {
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//bus = Bus(try! Rom(program))
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//for i in 0..<program.count {
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//memWrite(0x8000 + UInt16(i), data: program[i])
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//}
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2024-07-19 21:52:46 -05:00
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//memory[0x0600 ..< (0x0600 + program.count)] = program[0..<program.count]
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2024-08-18 14:55:39 -05:00
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//memWriteU16(0xFFFC, data: 0x0600)
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//}
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2024-05-10 22:06:45 -05:00
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func run() {
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2024-08-21 09:13:15 -05:00
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run(onCycle: {}, onComplete: {})
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2024-05-11 22:30:17 -05:00
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}
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2024-05-17 21:51:00 -05:00
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func run(onCycle: @escaping () -> (), onComplete: @escaping () -> ()) {
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2024-05-10 22:06:45 -05:00
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let opcodes = OPCODES_MAP
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2024-08-18 15:33:25 -05:00
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while true {
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2024-08-20 22:36:04 -05:00
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if bus.pollNMI() != nil {
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2024-08-19 21:05:08 -05:00
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interrupt(.NMI)
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}
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2024-08-18 15:33:25 -05:00
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processOpcodes(onCycle: onCycle, opcodes: opcodes) {
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2024-05-17 21:51:00 -05:00
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onComplete()
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}
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2024-05-17 13:15:10 -05:00
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}
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2024-08-19 21:05:08 -05:00
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}
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func interrupt(_ interrupt: Interrupt) {
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stackPushU16(programCounter)
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var flag = status
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if interrupt.bFlagMask & 0b010000 == 1 {
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flag.insert(.break1)
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} else {
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flag.remove(.break1)
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}
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if interrupt.bFlagMask & 0b100000 == 1 {
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flag.insert(.break2)
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} else {
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flag.remove(.break2)
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}
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stackPush(flag.rawValue)
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status.insert(.interruptDisable)
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bus.tick(interrupt.cpuCycles)
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programCounter = memReadU16(interrupt.vectorAddr)
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2024-05-17 13:15:10 -05:00
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}
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2024-05-10 22:06:45 -05:00
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2024-08-18 15:33:25 -05:00
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func processOpcodes(onCycle: () -> (), opcodes: [UInt8: OpCode], onComplete: () -> ()) {
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2024-05-17 21:51:00 -05:00
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onCycle()
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2024-05-17 13:15:10 -05:00
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let code = memRead(programCounter)
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programCounter += 1
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let programCounterState = programCounter
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guard let opcode = opcodes[code] else {fatalError("OpCode \(code) not recgonized!")}
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switch code {
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/// LDA
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case 0xa9, 0xa5, 0xb5, 0xad, 0xbd, 0xb9, 0xa1, 0xb1:
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lda(opcode.mode)
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/// STA
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case 0x85, 0x95, 0x8d, 0x9d, 0x99, 0x81, 0x91:
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sta(opcode.mode)
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case 0xd8:
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status.remove(.decimalMode)
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case 0x58:
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status.remove(.interruptDisable)
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case 0xb8:
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status.remove(.overflow)
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case 0x18:
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clearCarryFlag()
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case 0x38:
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setCarryFlag()
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case 0x78:
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status.insert(.interruptDisable)
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case 0xf8:
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status.insert(.decimalMode)
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case 0x48:
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stackPush(register_a)
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case 0x68:
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pla()
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case 0x08:
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php()
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case 0x28:
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plp()
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case 0x69, 0x65, 0x75, 0x6d, 0x7d, 0x79, 0x61, 0x71:
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adc(opcode.mode)
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case 0xe9, 0xe5, 0xf5, 0xed, 0xfd, 0xf9, 0xe1, 0xf1:
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sbc(opcode.mode)
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case 0x29, 0x25, 0x35, 0x2d, 0x3d, 0x39, 0x21, 0x31:
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and(opcode.mode)
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case 0x49, 0x45, 0x55, 0x4d, 0x5d, 0x59, 0x41, 0x51:
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eor(opcode.mode)
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case 0x09, 0x05, 0x15, 0x0d, 0x1d, 0x19, 0x01, 0x11:
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ora(opcode.mode)
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case 0x4a:
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lsrAccumulator()
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case 0x46, 0x56, 0x4e, 0x5e:
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_ = lsr(opcode.mode)
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case 0x0a:
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aslAccumulator()
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case 0x06, 0x16, 0x0e, 0x1e:
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_ = asl(opcode.mode)
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case 0x2a:
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rolAccumulator()
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case 0x26, 0x36, 0x2e, 0x3e:
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_ = rol(opcode.mode)
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case 0x6a:
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rorAccumulator()
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case 0x66, 0x76, 0x6e, 0x7e:
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_ = ror(opcode.mode)
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case 0xe6, 0xf6, 0xee, 0xfe:
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_ = inc(opcode.mode)
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case 0xc8:
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iny()
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case 0xc6, 0xd6, 0xce, 0xde:
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_ = dec(opcode.mode)
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case 0xca:
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dex()
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case 0x88:
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dey()
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case 0xc9, 0xc5, 0xd5, 0xcd, 0xdd, 0xd9, 0xc1, 0xd1:
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compare(mode: opcode.mode, compare_with: register_a)
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case 0xc0, 0xc4, 0xcc:
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compare(mode: opcode.mode, compare_with: register_y)
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case 0xe0, 0xe4, 0xec:
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compare(mode: opcode.mode, compare_with: register_x)
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case 0x4c:
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let memAddr = memReadU16(programCounter)
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programCounter = memAddr
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case 0x6c:
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let memAddr = memReadU16(programCounter)
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//6502 bug mode with with page boundary:
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// if address $3000 contains $40, $30FF contains $80, and $3100 contains $50,
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// the result of JMP ($30FF) will be a transfer of control to $4080 rather than $5080 as you intended
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// i.e. the 6502 took the low byte of the address from $30FF and the high byte from $3000
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let indirectRef: UInt16
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if memAddr & 0x00ff == 0x00ff {
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let lo = memRead(memAddr)
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2024-08-18 14:55:39 -05:00
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let hi = memRead(memAddr & 0xff00)
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2024-05-17 13:15:10 -05:00
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indirectRef = UInt16(hi) << 8 | UInt16(lo)
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} else {
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indirectRef = memReadU16(memAddr)
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2024-05-10 22:06:45 -05:00
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}
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2024-05-17 13:15:10 -05:00
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programCounter = indirectRef
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case 0x20:
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stackPushU16(programCounter + 2 - 1)
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let targetAddr = memReadU16(programCounter)
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programCounter = targetAddr
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case 0x60:
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programCounter = stackPopU16() + 1
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case 0x40:
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status.rawValue = stackPop()
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status.remove(.break1)
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2024-08-18 14:55:39 -05:00
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status.insert(.break2)
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2024-05-17 13:15:10 -05:00
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programCounter = stackPopU16()
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case 0xd0:
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branch(!status.contains(.zero))
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case 0x70:
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branch(status.contains(.overflow))
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case 0x50:
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branch(!status.contains(.overflow))
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case 0x10:
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branch(!status.contains(.negative))
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case 0x30:
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branch(status.contains(.negative))
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case 0xf0:
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branch(status.contains(.zero))
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case 0xb0:
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branch(status.contains(.carry))
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case 0x90:
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branch(!status.contains(.carry))
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case 0x24, 0x2c:
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bit(opcode.mode)
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case 0x86, 0x96, 0x8e:
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2024-08-19 21:05:08 -05:00
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|
let (addr, _) = getOpperandAddress(opcode.mode)
|
2024-05-17 13:15:10 -05:00
|
|
|
memWrite(addr, data: register_x)
|
|
|
|
case 0x84, 0x94, 0x8c:
|
2024-08-19 21:05:08 -05:00
|
|
|
let (addr, _) = getOpperandAddress(opcode.mode)
|
2024-05-17 13:15:10 -05:00
|
|
|
memWrite(addr, data: register_y)
|
|
|
|
case 0xa2, 0xa6, 0xb6, 0xae, 0xbe:
|
|
|
|
ldx(opcode.mode)
|
|
|
|
case 0xa0, 0xa4, 0xb4, 0xac, 0xbc:
|
|
|
|
ldy(opcode.mode)
|
|
|
|
case 0xea:
|
|
|
|
return
|
|
|
|
case 0xa8:
|
2024-08-18 14:55:39 -05:00
|
|
|
register_y = register_a
|
2024-05-17 13:15:10 -05:00
|
|
|
updateZeroAndNegativeFlags(register_y)
|
|
|
|
case 0xba:
|
|
|
|
register_x = stackPointer
|
|
|
|
updateZeroAndNegativeFlags(register_x)
|
|
|
|
case 0x8a:
|
|
|
|
register_a = register_x
|
|
|
|
updateZeroAndNegativeFlags(register_a)
|
|
|
|
case 0x9a:
|
|
|
|
stackPointer = register_x
|
|
|
|
case 0x98:
|
|
|
|
register_a = register_y
|
|
|
|
updateZeroAndNegativeFlags(register_a)
|
|
|
|
/// TAX
|
|
|
|
case 0xaa:
|
|
|
|
tax()
|
|
|
|
/// INX
|
|
|
|
case 0xe8:
|
|
|
|
inx()
|
|
|
|
/// BRK
|
|
|
|
case 0x00:
|
2024-08-18 15:33:25 -05:00
|
|
|
//timer.invalidate()
|
2024-05-17 21:51:00 -05:00
|
|
|
onComplete()
|
2024-08-18 14:55:39 -05:00
|
|
|
/// NOP Read
|
|
|
|
case 0x04, 0x44, 0x64, 0x14, 0x34, 0x54, 0x74, 0xd4, 0xf4, 0x0c, 0x1c, 0x3c, 0x5c, 0x7c, 0xdc, 0xfc:
|
2024-08-19 21:05:08 -05:00
|
|
|
let (addr, pageCross) = getOpperandAddress(opcode.mode)
|
2024-08-18 14:55:39 -05:00
|
|
|
let _ = self.memRead(addr)
|
2024-08-19 21:05:08 -05:00
|
|
|
if pageCross {
|
|
|
|
bus.tick(1)
|
|
|
|
}
|
2024-08-18 14:55:39 -05:00
|
|
|
// Do nothing
|
|
|
|
/// NOP
|
|
|
|
case 0x1a, 0x3a, 0x5a, 0x7a, 0xda, 0xfa:
|
|
|
|
{ /* Do Nothing */}()
|
|
|
|
/// RRA
|
|
|
|
case 0x67, 0x77, 0x6f, 0x7f, 0x7b, 0x63, 0x73:
|
|
|
|
let data = ror(opcode.mode)
|
|
|
|
addToRegisterA(data)
|
|
|
|
/// ISB
|
|
|
|
case 0xe7, 0xf7, 0xef, 0xff, 0xfb, 0xe3, 0xf3:
|
|
|
|
let data = inc(opcode.mode)
|
|
|
|
subFromRegisterA(data)
|
|
|
|
/// SKB
|
|
|
|
case 0x80, 0x82, 0x89, 0xc2, 0xe2:
|
|
|
|
{ /* 2 byte NOP immediate, do nothing */ }()
|
|
|
|
/// LAX
|
|
|
|
case 0xa7, 0xb7, 0xaf, 0xbf, 0xa3, 0xb3:
|
2024-08-19 21:05:08 -05:00
|
|
|
let (addr, _) = getOpperandAddress(opcode.mode)
|
2024-08-18 14:55:39 -05:00
|
|
|
let data = memRead(addr)
|
|
|
|
setRegisterA(data)
|
|
|
|
register_x = register_a
|
|
|
|
/// SAX
|
|
|
|
case 0x87, 0x97, 0x8f, 0x83:
|
|
|
|
let data = register_a & register_x
|
2024-08-19 21:05:08 -05:00
|
|
|
let (addr, _) = getOpperandAddress(opcode.mode)
|
2024-08-18 14:55:39 -05:00
|
|
|
memWrite(addr, data: data)
|
|
|
|
// Unoffical SBC
|
|
|
|
case 0xeb:
|
2024-08-19 21:05:08 -05:00
|
|
|
let (addr, _) = getOpperandAddress(opcode.mode)
|
2024-08-18 14:55:39 -05:00
|
|
|
let data = self.memRead(addr)
|
|
|
|
subFromRegisterA(data)
|
|
|
|
/// DCP
|
|
|
|
case 0xc7, 0xd7, 0xCF, 0xdF, 0xdb, 0xd3, 0xc3:
|
2024-08-19 21:05:08 -05:00
|
|
|
let (addr, _) = getOpperandAddress(opcode.mode)
|
2024-08-18 14:55:39 -05:00
|
|
|
var data = memRead(addr)
|
|
|
|
data = data &- 1
|
|
|
|
memWrite(addr, data: data)
|
|
|
|
if data <= register_a {
|
|
|
|
status.insert(.carry)
|
|
|
|
}
|
|
|
|
let tmp = register_a &- data
|
|
|
|
updateZeroAndNegativeFlags(tmp)
|
|
|
|
/// SLO
|
|
|
|
case 0x07, 0x17, 0x0F, 0x1f, 0x1b, 0x03, 0x13:
|
|
|
|
let data = asl(opcode.mode)
|
|
|
|
orWithRegisterA(data)
|
|
|
|
/// RLA
|
|
|
|
case 0x27, 0x37, 0x2F, 0x3F, 0x3b, 0x33, 0x23:
|
|
|
|
let data = rol(opcode.mode)
|
|
|
|
andWithRegisterA(data)
|
|
|
|
/// SRE
|
|
|
|
case 0x47, 0x57, 0x4F, 0x5f, 0x5b, 0x43, 0x53:
|
|
|
|
let data = lsr(opcode.mode)
|
|
|
|
xorWithRegisterA(data)
|
|
|
|
|
|
|
|
|
|
|
|
|
2024-05-17 13:15:10 -05:00
|
|
|
default: fatalError("TODO!")
|
|
|
|
}
|
|
|
|
|
2024-08-19 21:05:08 -05:00
|
|
|
bus.tick(opcode.cycles)
|
|
|
|
|
2024-05-17 13:15:10 -05:00
|
|
|
if programCounterState == programCounter {
|
|
|
|
programCounter += UInt16(opcode.len - 1)
|
2024-05-10 22:06:45 -05:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
func updateZeroAndNegativeFlags(_ result: UInt8) {
|
|
|
|
if result == 0 {
|
2024-05-11 22:30:17 -05:00
|
|
|
status.insert(.zero)
|
2024-05-10 22:06:45 -05:00
|
|
|
} else {
|
2024-05-11 22:30:17 -05:00
|
|
|
status.remove(.zero)
|
2024-05-10 22:06:45 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
if result & 0b1000_0000 != 0 {
|
2024-05-11 22:30:17 -05:00
|
|
|
status.insert(.negative)
|
2024-05-10 22:06:45 -05:00
|
|
|
} else {
|
2024-05-11 22:30:17 -05:00
|
|
|
status.remove(.negative)
|
2024-05-10 22:06:45 -05:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2024-05-11 22:30:17 -05:00
|
|
|
func setRegisterA(_ value: UInt8) {
|
2024-05-10 22:06:45 -05:00
|
|
|
register_a = value
|
|
|
|
updateZeroAndNegativeFlags(register_a)
|
|
|
|
}
|
|
|
|
|
2024-05-11 22:30:17 -05:00
|
|
|
func setCarryFlag() {
|
|
|
|
status.insert(.carry)
|
2024-05-10 22:06:45 -05:00
|
|
|
}
|
|
|
|
|
2024-05-11 22:30:17 -05:00
|
|
|
func clearCarryFlag() {
|
|
|
|
status.remove(.carry)
|
2024-05-10 22:06:45 -05:00
|
|
|
}
|
|
|
|
|
2024-05-11 22:30:17 -05:00
|
|
|
/// note: ignoring decimal mode
|
|
|
|
/// http://www.righto.com/2012/12/the-6502-overflow-flag-explained.html
|
|
|
|
func addToRegisterA(_ data: UInt8) {
|
|
|
|
let shouldCarry = status.contains(.carry) ? 1 : 0
|
|
|
|
let sum = UInt16(register_a) + UInt16(data) + UInt16(shouldCarry)
|
|
|
|
|
|
|
|
let carry = sum > 0xff
|
|
|
|
|
|
|
|
if carry {
|
|
|
|
status.insert(.carry)
|
|
|
|
} else {
|
|
|
|
status.remove(.carry)
|
|
|
|
}
|
|
|
|
|
2024-05-17 13:15:10 -05:00
|
|
|
let result = UInt8(truncatingIfNeeded: sum)
|
2024-05-11 22:30:17 -05:00
|
|
|
|
|
|
|
if (data ^ result) & (result ^ register_a) & 0x80 != 0 {
|
|
|
|
status.insert(.overflow)
|
|
|
|
} else {
|
|
|
|
status.remove(.overflow)
|
|
|
|
}
|
|
|
|
|
|
|
|
setRegisterA(result)
|
|
|
|
}
|
|
|
|
|
2024-08-18 14:55:39 -05:00
|
|
|
func subFromRegisterA(_ data: UInt8) {
|
|
|
|
addToRegisterA(UInt8(bitPattern: (Int8(bitPattern: data) &* -1) &- 1))
|
|
|
|
}
|
|
|
|
|
|
|
|
func orWithRegisterA(_ data: UInt8) {
|
|
|
|
setRegisterA(data | self.register_a)
|
|
|
|
}
|
|
|
|
|
|
|
|
func xorWithRegisterA(_ data: UInt8) {
|
|
|
|
setRegisterA(data ^ self.register_a)
|
|
|
|
}
|
|
|
|
|
|
|
|
func andWithRegisterA(_ data: UInt8) {
|
|
|
|
setRegisterA(data & register_a)
|
|
|
|
}
|
|
|
|
|
2024-05-11 22:30:17 -05:00
|
|
|
func stackPop() -> UInt8 {
|
|
|
|
stackPointer = stackPointer &+ 1
|
|
|
|
return memRead(STACK + UInt16(stackPointer))
|
|
|
|
}
|
|
|
|
|
|
|
|
func stackPush(_ data: UInt8) {
|
|
|
|
memWrite(STACK + UInt16(stackPointer), data: data)
|
|
|
|
stackPointer = stackPointer &- 1
|
|
|
|
}
|
|
|
|
|
|
|
|
func stackPopU16() -> UInt16 {
|
|
|
|
let lo = UInt16(stackPop())
|
|
|
|
let hi = UInt16(stackPop())
|
|
|
|
|
|
|
|
return hi << 8 | lo
|
|
|
|
}
|
|
|
|
|
|
|
|
func stackPushU16(_ data: UInt16) {
|
|
|
|
let hi = UInt8(data >> 8)
|
|
|
|
let lo = UInt8(data & 0xff)
|
|
|
|
stackPush(hi)
|
|
|
|
stackPush(lo)
|
|
|
|
}
|
|
|
|
|
|
|
|
func compare(mode: AddressingMode, compare_with: UInt8) {
|
2024-08-19 21:05:08 -05:00
|
|
|
let (addr, pageCross) = getOpperandAddress(mode)
|
2024-05-11 22:30:17 -05:00
|
|
|
let data = memRead(addr)
|
|
|
|
if data <= compare_with {
|
|
|
|
status.insert(.carry)
|
|
|
|
} else {
|
|
|
|
status.remove(.carry)
|
|
|
|
}
|
|
|
|
|
|
|
|
updateZeroAndNegativeFlags(compare_with &- data)
|
2024-08-19 21:05:08 -05:00
|
|
|
|
|
|
|
if pageCross {
|
|
|
|
bus.tick(1)
|
|
|
|
}
|
2024-05-11 22:30:17 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
func branch(_ condition: Bool) {
|
|
|
|
if condition {
|
2024-08-19 21:05:08 -05:00
|
|
|
bus.tick(1)
|
2024-05-11 22:30:17 -05:00
|
|
|
let addr = memRead(programCounter)
|
|
|
|
let jump: Int8 = Int8(bitPattern: addr)
|
|
|
|
let jump_addr = programCounter &+ 1 &+ UInt16(bitPattern: Int16(jump))
|
|
|
|
|
2024-08-19 21:05:08 -05:00
|
|
|
if (programCounter &+ 1) & 0xff00 != jump_addr & 0xff00 {
|
|
|
|
bus.tick(1)
|
|
|
|
}
|
|
|
|
|
2024-05-11 22:30:17 -05:00
|
|
|
programCounter = jump_addr
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
extension CPU: Memory {
|
|
|
|
func memRead(_ addr: UInt16) -> UInt8 {
|
2024-08-18 14:55:39 -05:00
|
|
|
return bus.memRead(addr)
|
2024-05-10 22:06:45 -05:00
|
|
|
}
|
|
|
|
|
2024-05-11 22:30:17 -05:00
|
|
|
func memWrite(_ addr: UInt16, data: UInt8) {
|
2024-08-18 14:55:39 -05:00
|
|
|
bus.memWrite(addr, data: data)
|
2024-07-19 21:52:46 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
func memReadU16(_ addr: UInt16) -> UInt16 {
|
2024-08-18 14:55:39 -05:00
|
|
|
return bus.memReadU16(addr)
|
2024-07-19 21:52:46 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
func memWriteU16(_ addr: UInt16, data: UInt16) {
|
2024-08-18 14:55:39 -05:00
|
|
|
bus.memWriteU16(addr, data: data)
|
2024-05-11 22:30:17 -05:00
|
|
|
}
|
|
|
|
}
|
2024-05-10 22:06:45 -05:00
|
|
|
|
2024-05-11 22:30:17 -05:00
|
|
|
|
|
|
|
protocol Memory {
|
|
|
|
func memRead(_ addr: UInt16) -> UInt8
|
|
|
|
|
|
|
|
func memWrite(_ addr: UInt16, data: UInt8)
|
|
|
|
|
|
|
|
func memReadU16(_ addr: UInt16) -> UInt16
|
|
|
|
|
|
|
|
func memWriteU16(_ addr: UInt16, data: UInt16)
|
|
|
|
}
|
|
|
|
|
|
|
|
extension Memory {
|
|
|
|
func memReadU16(_ addr: UInt16) -> UInt16 {
|
|
|
|
let lo = UInt16(memRead(addr))
|
|
|
|
let hi = UInt16(memRead(addr + 1))
|
|
|
|
return (hi << 8) | lo
|
|
|
|
}
|
|
|
|
|
|
|
|
func memWriteU16(_ addr: UInt16, data: UInt16) {
|
|
|
|
let hi = UInt8(data >> 8)
|
|
|
|
let lo = UInt8(data & 0xff)
|
|
|
|
self.memWrite(addr, data: lo)
|
|
|
|
self.memWrite(addr + 1, data: hi)
|
|
|
|
}
|
2024-05-10 22:06:45 -05:00
|
|
|
}
|